전자회로실험 A+ 10주차 결과보고서(BJT Amp Biasing)
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- 2023.07.02
- 최종 저작일
- 2023.05
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"전자회로실험 A+ 10주차 결과보고서(BJT Amp Biasing)"에 대한 내용입니다.
목차
1. 실험목표
2. 실험과정
3. 실험결과
4. 실험결과 사진
5. PSPICE 결과
6. PSPICE 사진
7. 분석 및 토의
본문내용
1. 실험목표
-Measure the frequency response of common emitter amplifier.
-Observe the effect of emitter bypass capacitor on the amplifier gain.
-Measure the input impedance and output impedance of CE amplifier.
2. 실험과정
(1) Frequency Response of Common Emitter Amplifier
1. Construct the common emitter amplifier as shown in Figure 7.1. Use a RC = 1 kΩ, RB = 560 Ω, and VCC = 9 V.
2. For the input signal, use a 25 mV peak-to-peak sine wave with a DC offset of 650 mV. This signal is both VBIAS and vin combined, and will be referred to as vIN.
3. Using the oscilloscope, plot vIN on Channel 2 and vOUT on Channel 1. Take a picture of the waveform on the oscilloscope and attach it to your report.
4. Record the magnitude and phase of out/vin as measured from the oscilloscope in table 7.1.
5. Using the techniques mentioned above, create the Bode magnitude and phase plots. To save time, sweep the frequency in decades first (i.e. increment by factors of 10) and do not exceed 2 MHz for this circuit. Then, take more measurements in frequency ranges where the poles are located.
6. Find the frequency where the gain decreases from its DC value by 3 dB; this frequency is called the dominant pole of the amplifier. What is the phase at this frequency? Record them in table 7.1. Is the phase consistent with the magnitude? (Recall that at the -3 dB point, the phase should drop from its DC value by 45 degrees.)
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