Effects of Drain Bias on Memory-Compensated Analog Predistortion Power Amplifier for WCDMA Repeater Applications

서지정보

· 발행기관 : 한국전자파학회
· 수록지 정보 : Journal of Electromagnetic Engineering and Science / 9권 / 2호 / 78 ~ 83페이지
· 저자명 : 이용섭, 이문우, 감상호, 정윤하

초록

This paper represents the effects of drain bias on the linearity and efficiency of an analog pre-distortion power amplifier(PA) for wideband code division multiple access(WCDMA) repeater applications. For verification, an analog predistorter(APD) with three-branch nonlinear paths for memory-effect compensation is implemented and a class-AB PA is fabricated using a 30-W Si LDMOS. From the measured results, at an average output power of 33 dBm(10-dB back-off power), the PA with APD shows the adjacent channel leakage ratio(ACLR, ±5 MHz offset) of below —45.1 dBc, with a drain efficiency of 24 % at the drain bias voltage(VDD) of 18 V. This compared an ACLR of —36.7 dBc and drain efficiency of 14.1 % at the VDD of 28 V for a PA without APD.

참고자료

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